Embodiments disclosed herein relate generally to the field of downhole measurement tool circuits, and more particularly, but not by way of limitation, to an improved downhole measurement tool peak hold circuit and method for reducing the effect of temperature on the circuit in high-temperature downhole logging applications.
Downhole tools are often used to collect data and measure downhole parameters in the wellbore. The data that is gathered through the use of these downhole tools can be used to detect problems that might occur due to adverse downhole conditions. In many instances, downhole tools are subjected to high-temperature, corrosive environments. The downhole tools must be able to operate to provide reliable data regarding the downhole environment to the surface regardless of the temperature of the downhole environment.
Downhole sensors often employ circuits that detect a condition (e.g., temperature, vibration, pressure) and output an analog signal representative of the measured condition. The analog output signal is then conditioned, sampled and processed. In many cases, the analog signal is converted to digital through a sampling process. Sample and hold circuits are used to measure peak voltage values, store the peak voltage value and output the peak voltage to downstream circuits. Peak hold circuits are well known in the art for performing this function.
Shown in FIG. 1 is an illustration of a PRIOR ART peak hold circuit 500. In the peak hold circuit 500, the input voltage 502 is connected to a base 504 of a first transistor 506. The emitter 508 of the first transistor 506 and the emitter 510 of a second transistor 512 are coupled together and then coupled to a low voltage source 514 via a first resistor 516 to form a long tail pair circuit. In the peak hold circuit 500, the collector 518 of the first transistor 506, the collector 520 of the second transistor 512 and the emitter 522 of a third transistor 524 are connected to a high voltage source 526. The value of a second resistor 528 is selected such that the current flowing through it is one half of the current flowing through the first resistor 516. This selection of the value of the second resistor 528 causes the third transistor 524 to switch off when the input voltage 502 is at a peak and the first transistor 506 and second transistor 512 are balanced. Switching off the third transistor 524 minimizes offset errors which may result due to imperfections present in the hold capacitor 530, the third transistor 524 and the output amplifier 532.
A rise in temperature does not significantly or differentially affect the long tail pair circuit formed by the first transistor 506 and the second transistor 512 because as temperature fluctuates both of these transistors are affected to the same degree. However, the third transistor 524 is still affected by temperature variations and only switches off when the first transistor 506 and the second transistor 512 are balanced at a particular temperature. This inability to operate at a variety of temperatures causes uncertainty in the output data measured by the circuit.
There is, therefore, a need for an improved downhole peak hold circuit and method that minimizes the offset error resulting from temperature changes in the downhole environment. It is to this and other deficiencies in the field that embodiments disclosed herein are directed.